As autonomous vehicles demand higher compute performance, efficiency, and flexibility, the traditional monolithic System-on-Chip (SoC) architecture is nearing its limits. This talk explores the transition toward disaggregated computing architectures using chiplets—a modular approach that breaks down complex SoC designs into smaller, reusable silicon dies interconnected within a single package. By decoupling functional domains such as perception, planning, and control, chiplet-based designs promise scalability, heterogeneous integration, and improved thermal and power management. We will examine the implications of chiplet architectures for functional safety, low-latency data movement, and real-time performance, as well as the evolving standards and interconnect technologies enabling this paradigm shift in automotive computing.
Join this presentation to learn how to:
- Improve scalability and flexibility with modular chiplet-based compute architectures
- Reduce cost and time-to-market via heterogeneous chiplet integration
- Minimize latency and system complexity using advanced interconnects and co-packaging
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